A semiconductor package is defined as a type of package technology for electrically connecting a semiconductor chip to a printed circuit board (PCB), such as a main board of an electronic device, or the like, and protecting the semiconductor chip from external impacts, and is distinguished from a technology of embedding semiconductor chips in a PCB, such as an interposer substrate. A significant recent trend in the development of technology related to the semiconductor chip is to reduce the size of the semiconductor chip. Hence, in a package field, in accordance with a rapid increase in demand for compact semiconductor chip, or the like, a semiconductor package having a compact size and including a plurality of pins has been demanded.
One type of package technology suggested to satisfy the technical demand as described above is a wafer level package (WLP) using redistribution of an electrode pad included in a semiconductor chip formed on a wafer. WLPs include a fan-in WLP and a fan-out WLP. In particular, the fan-out WLP has a reduced size, and is advantageous in terms of implementing a plurality of pins. Therefore, the fan-out WLP has been actively developed.
Meanwhile, in the case of the abovementioned WLPs in which a semiconductor chip is merely encapsulated by a common encapsulant, it is difficult to properly control various side effects that may occur in the manufacturing process, such as shifting of a semiconductor chip and warpage of a fan-out semiconductor package.